1. Technology Field
The present invention relates to a data writing method. More particularly, the present invention relates to a data writing method for a rewritable non-volatile memory module, and a memory controller and a memory storage apparatus using the same.
2. Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 in recently years, the consumers' demand to storage media has increased drastically. Since a rewritable non-volatile memory is characterized by non-volatility of data, low power consumption, small volume, non-mechanical structure, and fast reading and writing speed, the rewritable non-volatile memory is the most adaptable memory to be applied in a portable electronic product, e.g., a notebook computer. A solid state drive (SSD) is a storage apparatus which utilizes a flash memory as its storage medium. Therefore, the flash memory industry has become a very popular part of the electronic industry in recent years.
A flash memory storage system has a plurality of physical blocks, and each of the physical blocks has a plurality of physical pages, wherein data must be written orderly into the physical blocks according to the sequence of the physical pages in the physical blocks. In addition, a physical page containing data has to be erased before it is used for a new data writing operation. Particularly, each physical block is the smallest erasing unit, and each physical page is the smallest programming (i.e., writing) unit. Therefore, in the management of the flash memory storage system, the physical blocks are grouped into a data area and a spare area.
The physical blocks of the data area are used for storing data written by a host system. To be more specific, a control circuit converts a logical access address accessed by the host system into a logical page of a logical block and maps the logical pages of the logical blocks to physical pages of the physical blocks of the data area. Namely, in the management of a flash memory module, the physical blocks of the data area are deemed used physical blocks (e.g., the physical blocks already contain data written by the host system). For instance, the control circuit records the mapping relationship between the logical blocks and the physical blocks of the data area in a logical block-physical block mapping table, and the logical pages of each logical block are sequentially mapped to the physical pages of the corresponding physical block.
Physical blocks in the spare area are used for substituting the physical blocks of the data area. In particular, as described above, a physical block already containing data has to be erased before it is used for a new data writing operation, and thus the physical blocks in the spare area are used for writing updated data to substitute the physical blocks originally mapped to the logical blocks. Hence, the physical blocks in the spare area are either blank blocks or available blocks (i.e., these blocks do not contain data, or these blocks contain data marked as invalid data).
The physical blocks of the data area and the spare area are alternated to store data written by the host system. To allow the host system to properly access the physical blocks that store data in an alternate mechanism, the flash memory storage system provides logical blocks and transforms the logical access addresses accessed by the host system into the logical pages of the corresponding logical blocks. Specifically, the flash memory storage system may transform a logical access address accessed by the host system into a corresponding logical block and record and update a mapping relationship between the logical blocks and the physical blocks of the data area in a logical block-physical block mapping table to reflect the alternation of the physical blocks. Thus, the host system simply accesses data based on the logical access addresses, while the flash memory storage system reads data from or writes data into the mapped physical block according to the logical block-physical block mapping table.
In particular, when the host system is about to store new data into a logical access address, a control circuit of the flash memory storage system identifies a logical block corresponding to the logical access address, selects a physical block from the spare area, and writes the new data into the selected physical block (i.e., also referred to as “a child physical block” or “a substitute physical block”) to replace a physical block (also referred to as “a mother physical block”) originally mapped to the logical block. Here, the operation of mapping one logical block to a mother physical block and a child physical block is referred to as “opening mother-child blocks”, and one mother physical block and one child physical block that map to the same logical block are collectively referred to as a mother-child block set. Generally, the number of physical blocks in the spare area is limited. Accordingly, in a flash memory storage system, the number of the mother-child block sets is limited as well. For instance, the flash memory storage system may simultaneously open three mother-child block sets at most. Afterward, when the host system is about to write data into another logical block, the flash memory storage system must perform a data merge operation to merge valid data of the mother-child block set mapped to a logical block (i.e., the data belonging to this logical block is merged into one physical block).
When the capacity of one logical block is designed to become greater, and the host system frequently just updates data stored in a portion of logical pages of the logical block, the flash memory storage system needs to spend more time to perform the above-mentioned data merge operation for executing the next write command. Therefore, the time of executing the write command is delayed, and the performance of the flash memory storage system is decreased. As a result, how to effectively write data for shortening the time required for executing a write command is one of the major subjects in the industry.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.